Electromigration Modeling at Circuit Layout Level

Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels.  Electromigration (EM) of interconnects has...

Descripción completa

Detalles Bibliográficos
Autor principal: Tan, Cher Ming (-)
Autor Corporativo: SpringerLink (-)
Otros Autores: He, Feifei
Formato: Libro electrónico
Idioma:Inglés
Publicado: Singapore : Springer Singapore 2013.
Colección:SpringerBriefs in Applied Sciences and Technology.
Springer eBooks.
Acceso en línea:Conectar con la versión electrónica
Ver en Universidad de Navarra:https://innopac.unav.es/record=b33056419*spi
Descripción
Sumario:Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels.  Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level. .
Descripción Física:IX, 103 p., 75 il., 2 il. col
Formato:Forma de acceso: World Wide Web.
ISBN:9789814451215