VLSI test principles and architectures design for testability
This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of indu...
| Otros Autores: | , , |
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| Formato: | Libro electrónico |
| Idioma: | Inglés |
| Publicado: |
Amsterdam ; Boston :
Elsevier Morgan Kaufmann Publishers
2006.
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| Colección: | The Morgan Kaufmann series in systems on silicon.
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| Acceso en línea: | Conectar con la versión electrónica |
| Ver en Universidad de Navarra: | https://innopac.unav.es/record=b31700780*spi |
| Sumario: | This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures. Lecture slides and exercise solutions for all chapters are now available. Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website. |
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| Descripción Física: | xxx, 777 p. : il |
| Formato: | Forma de acceso: World Wide Web. |
| Bibliografía: | Incluye referencias bibliográficas e índice. |
| ISBN: | 9780080474793 |
