| Sumario: | On behalf of the organizing committee, we are delighted to welcome you to the 2019 ACM International Symposium on Physical Design (ISPD), held in San Francisco, California. Continuing the great tradition established by its twenty-seven predecessors, which includes a series of five ACM/SIGDA Physical Design Workshops held intermittently in 1987-1996 and twenty-two editions of ISPD in the current form since 1997. The 2019 ISPD provides a premier forum to present leading-edge research results, exchange ideas, and promote research on critical areas related to the physical design of VLSI and other related systems. The regular papers in the ISPD 2019 program were selected after a rigorous, month-long, double-blind review process and a face-to-face meeting by the Technical Program Committee (TPC) members. The papers selected exhibit latest advancements in a variety of topics in physical design, including emerging challenges for current and future process technologies, FPGA architectures, placement, detailed routing, floorplanning and interconnect planning, partitioning techniques, manufacturability and yield optimization, timing and crosstalk issues, analysis and management of power dissipation, hardware security, placement and routing approaches of networks on chips, gate sizing and clock skew scheduling, electromigration, and application of machine-learning based techniques to physical design. The ISPD 2019 program is complemented by three keynote addresses, thirteen invited talks, a FPGA special session on advances in adaptable heterogeneous computing and acceleration, a cyber physical systems session, the detailed routing contest session results, the ISPD lifetime award tribute session, and a special panel discussion session on machine learning in physical design, all of which are delivered by distinguished researchers from both industry and academia. Mr. Shankar Krishnamoorthy, Senior Vice President of Digital Implementation at Synopsys, will deliver the Monday morning keynote address entitled "Fusion: The Dawn of the Hyperconvergence Era in EDA." Mr. Krishnamoorthy's keynote will explore how the concepts of hyperconvergence (integration of disparate areas of compute, storage, and networking on a unified architecture) can be applied to the EDA design tool chain flow to deliver further disruptive improvements in IC power, performance, and area. Dr. Ken Plaks, DARPA Program Manager for Obfuscated Manufacturing for GPS, will deliver the Tuesday morning keynote address entitled "A Perspective on Security and Trust Requirements for the Future." In his keynote, Dr. Plaks will address a key aspect of hardware security: Design obfuscation. He will share his in-depth insights on (1) what type of metrics are required to measure effectiveness of obfuscation techniques, (2) what types of design implementation tools needed, and (3) how to ensure implemented obfuscation solutions that are scalable and performance preserving. Professor Edward Lee will deliver the ISPD Lifetime Achievement Award keynote address entitled "Freedom from Choice and the Power of Models" in honor of Professor Sangiovanni. He will share an insightful perspective on modeling paradigms, how their construction is influenced by practical real-life constraints, and how their functions vary and manifest differently in the engineering and scientific disciplines. Given the breadth of Professor Alberto Sangiovanni-Vincentelli's research work, two commemorative sessions on Tuesday afternoon will pay tribute to his decades-long contributions in the areas of physical design, VLSI applications and cyber physical systems. These sessions will feature talks from research colleagues who are luminaries in their respective fields. Their talks will span topics from the early start of Spice, advanced research areas in logic synthesis, EDA to automotive design automation, a perspective on design automation of cyber physical systems, secure and trustworthy cyber physical systems, and platform-based design. These will be culminated with a talk by Professor Sangiovanni entitled "My 50-Year Journey from Punched Cards to Swarm Systems." There will be other invited talks interspersed with the presentations of the regular papers. The topics of the invited papers range from advanced FPGA architectures for heterogenous and adaptive computing, large-scale graph analytics FPGA acceleration, electromigration-aware interconnect design, deep learning applications and infrastructure enablement in physical design, electromigration-aware physical design, recent advances in analog layout synthesis, among others.
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