Testing for small-delay defects in nanoscale CMOS integrated circuits
Advances in design methods and process technologies have resulted in a continuous increase in the complexity of integrated circuits (ICs). However, the increased complexity and nanometer-size features of modern ICs make them susceptible to manufacturing defects, as well as performance and quality is...
| Otros Autores: | , |
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| Formato: | Libro electrónico |
| Idioma: | Inglés |
| Publicado: |
Boca Raton :
CRC Press
2014.
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| Edición: | 1st edition |
| Colección: | Devices, Circuits, and Systems
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| Materias: | |
| Ver en Biblioteca Universitat Ramon Llull: | https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009628719706719 |
| Sumario: | Advances in design methods and process technologies have resulted in a continuous increase in the complexity of integrated circuits (ICs). However, the increased complexity and nanometer-size features of modern ICs make them susceptible to manufacturing defects, as well as performance and quality issues. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits covers common problems in areas such as process variations, power supply noise, crosstalk, resistive opens/bridges, and design-for-manufacturing (DfM)-related rule violations. The book also addresses testing |
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| Notas: | Description based upon print version of record. |
| Descripción Física: | 1 online resource (240 p.) |
| Bibliografía: | Includes bibliographical references. |
| ISBN: | 9781315217819 9781439829417 |
