VLSI test principles and architectures design for testability
This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.· Most up-to-date coverage of design for testability. · Coverage of i...
| Other Authors: | , , |
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| Format: | eBook |
| Language: | Inglés |
| Published: |
Amsterdam ; Boston :
Elsevier Morgan Kaufmann Publishers
c2006.
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| Edition: | 1st edition |
| Series: | Morgan Kaufmann series in systems on silicon.
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| Subjects: | |
| See on Biblioteca Universitat Ramon Llull: | https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009627292406719 |
| Summary: | This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.· Most up-to-date coverage of design for testability. · Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. · Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.· Lecture slides and exercise solutions for all chapters are now available.· |
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| Item Description: | Description based upon print version of record. |
| Physical Description: | 1 online resource (809 p.) |
| Bibliography: | Includes bibliographical references and index. |
| ISBN: | 9781280966842 9786610966844 9780080474793 |
