Formal verification : an essential toolkit for modern VLSI design

Formal verification an essential toolkit for modern VLSI design

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Formal Verification: An Essential Toolkit for Modern VLSI Design, Second Edition presents practical approaches for design and validation, with hands-on advice to help working engineers integrate these techniques into their work. Formal Verification (FV) enables a designer to directly analyze and mat...

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Detalles Bibliográficos
Otros Autores: Seligman, Erik, author (author), Schubert, E. Thomas, 1959- author, Kumar, M. V. Achutha Kiran, author
Formato: Libro electrónico
Idioma:Inglés
Publicado: Cambridge, MA : Morgan Kaufmann Publishers [2023]
Edición:Second edition
Materias:
Electronic circuits > Testing.
Integrated circuits > Very large scale integration > Design and construction.
Verilog (Computer hardware description language)
Ver en Biblioteca Universitat Ramon Llull:https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009752720306719

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