3D integration for VLSI systems

Three-dimensional (3D) integration is identified as a possible avenue for continuous performance growth in integrated circuits (IC) as the conventional scaling approach is faced with unprecedented challenges in fundamental and economic limits. Wafer level 3D IC can take several forms, and they usual...

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Detalles Bibliográficos
Otros Autores: Tan, Chuan Seng (-), Chen, Kuan-Neng, Koester, Steven J.
Formato: Libro electrónico
Idioma:Inglés
Publicado: Boca Raton, Fla. : CRC Press 2012.
Edición:1st ed
Materias:
Ver en Biblioteca Universitat Ramon Llull:https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009627909506719
Descripción
Sumario:Three-dimensional (3D) integration is identified as a possible avenue for continuous performance growth in integrated circuits (IC) as the conventional scaling approach is faced with unprecedented challenges in fundamental and economic limits. Wafer level 3D IC can take several forms, and they usually include a stack of several thinned IC layers that are vertically bonded and interconnected by through silicon via TSV. There is a long string of benefits that one can derive from 3D IC implementation such as form factor, density multiplication, improved delay and power, enhanced bandwidth, and heterogeneous integration. This book presents contributions by key researchers in this field, covering motivations, technology platforms, applications, and other design issues.
Notas:Bibliographic Level Mode of Issuance: Monograph
Descripción Física:1 online resource (376 p.)
Bibliografía:Includes bibliographical references.
ISBN:9781040000106
9780429067464
9789814303828