Nano-CMOS gate dielectric engineering
According to Moore's Law, not only does the number of transistors in an integrated circuit double every two years, but transistor size also decreases at a predictable rate. At the rate we are going, the downsizing of CMOS transistors will reach the deca-nanometer scale by 2020. Accordingly, the...
| Autor principal: | |
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| Formato: | Libro electrónico |
| Idioma: | Inglés |
| Publicado: |
Boca Raton :
CRC Press
2012.
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| Edición: | 1st edition |
| Materias: | |
| Ver en Biblioteca Universitat Ramon Llull: | https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009627662906719 |
Tabla de Contenidos:
- Front Cover; Contents; Foreword; Preface; List of Abbreviations; Chapter 1: Overview of CMOS Technology; Chapter 2: High-k Dielectrics; Chapter 3: Complex Forms of High-k Oxides; Chapter 4: Dielectric Interfaces; Chapter 5: Impacts on Device Operation; Chapter 6: Fabrication Issues; Chapter 7: Conclusions; Appendix A: Fundamental Physical Constants and Unit Conversions; Appendix B: Properties of Si and SiO2; Back Cover
